The cache replacement policy is one of the factors that determines the effectiveness of cache memories. We study the impact of incorporating the cache block coherence state information in the random replacement policy in a shared memory multiprocessor. We assign replacement priority to each cache block within a set based on its state. To reduce the probability of replacing a recently accessed block and to adapt to the program's access patterns, we also associate with each set an MRU (Most Recently Used) state. The MRU state causes the lowest replacement priority to be assigned to the blocks in the same state as the MRU state. Our evaluations indicate that, with the appropriate priority assignment and a set associativity size less than 16, the proposed policy can outperform the Random and Random & Invalid policies and, in some cases, can even outperform the LRU policy.