Tutorial: Optimization and analysis techniques for the deep submicron regime

N. Menezes, S. Sapatnekar

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Scaling in the deep submicron (DSM) regime has fundamentally altered the primary issues affecting VLSI design. Logical-physical codesign is essential with great dependence between logic-level optimizations and the actual physical design. The problems encountered in the DSM design and the computer aided design (CAD) strategies used to overcome them were discussed.

Original languageEnglish (US)
Title of host publicationProceedings of the IEEE International Conference on VLSI Design
Pages3-4
Number of pages2
StatePublished - Jan 1 2001
Event14th International Conference on VLSI Design (VLSI DESIGN 2001) - Bangalore, India
Duration: Jan 3 2001Jan 7 2001

Other

Other14th International Conference on VLSI Design (VLSI DESIGN 2001)
CountryIndia
CityBangalore
Period1/3/011/7/01

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