Fingerprint
Dive into the research topics of 'Unified algorithm for gate sizing and clock skew optimization to minimize sequential circuit area'. Together they form a unique fingerprint.- Sort by
- Weight
- Alphabetically
Unified algorithm for gate sizing and clock skew optimization to minimize sequential circuit area
Weitong Chuang, Sachin S. Sapatnekar, Ibrahim N. Hajj
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
9
Scopus
citations