Projects per year
Search results
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Active
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Collaborative Research: DESC: Type I: Towards Reduce- and Reuse-based Design of VLSI Systems with Heterogeneous Integration
10/1/23 → 9/30/26
Project: Research project
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Automated energy-efficient sensor data winnowing using native analog processing
THE NATIONAL SCIENCE FOUNDATION
10/1/22 → 9/30/26
Project: Research project
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Collaborative Research: SHF: Medium: Automated energy-efficient sensor data winnowing using native analog processing
Harjani, R. & Sapatnekar, S. S.
10/1/22 → 9/30/26
Project: Research project
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ASCENT: TUNA: TUnable randomness for NAtural computing
Sapatnekar, S. S., Wang, J., Kim, C. H. & Karpuzcu, U.
10/1/22 → 9/30/26
Project: Research project
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Automated Layout Of Analog Arrays In Advanced Technology Nodes
Sapatnekar, S. S. & Harjani, R.
UNIVERSITY OF TEXAS AT DALLAS, SEMICONDUCTOR RESEARCH CORPORATION
1/1/22 → 12/31/24
Project: Research project
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Not started
Collaborative Research: SHF: Medium: Tiny Chiplets for Big AI: A Reconfigurable-On-Package System
THE NATIONAL SCIENCE FOUNDATION
7/1/24 → 6/30/28
Project: Research project
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Finished
DESIGN AND MODELING OF MACHINE LEARNING HARDWARE FOR GRAPH PROCESSING
SEMICONDUCTOR RESEARCH CORPORATION
1/1/21 → 12/31/23
Project: Research project
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Analysis and Optimization of Rapid Thermal Annealing Effects in Integrated Circuits
12/31/20 → 12/30/21
Project: Research project
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VeriGOOD-ML: Verilog Generator (Open-source), Optimized for Designs for Machine Learning
USDOD DEFENSE ADV RES PROJECTS
12/30/19 → 7/1/23
Project: Research project
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ALIGN: Analog Layout, Intelligently Generated from Netlists
Sapatnekar, S. S. & Harjani, R.
8/13/18 → 2/12/23
Project: Research project
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OpenROAD: Foundations and Realization of Open, Accessibl
UNIVERSITY OF CALIFORNIA SAN DIEGO, USDOD DEFENSE ADV RES PROJECTS
6/1/18 → 9/30/23
Project: Research project
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SHF: Medium: Time Based Deep Neural Networks: An Integra
Kim, C. H., Sapatnekar, S. S. & Zhao, C.
THE NATIONAL SCIENCE FOUNDATION
5/1/18 → 4/30/24
Project: Research project
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SHF:Small:Enchancing the Reliability of Mixed-Signal Int
THE NATIONAL SCIENCE FOUNDATION
9/1/17 → 8/31/22
Project: Research project
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SHF: Small: Enchancing the Reliability of Mixed-Signal Integrated Circuits
9/1/17 → 8/31/22
Project: Research project
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SPX: Scalable In-Memory Processing Using Spintronics
Karpuzcu, U., Sapatnekar, S. S. & Wang, J.
8/15/17 → 7/31/21
Project: Research project
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Mitigating Reliability Issues in Analog Circuits
Kim, C. H. & Sapatnekar, S. S.
UNIVERSITY OF TEXAS AT DALLAS, Sustainable Resources Center, Inc.
3/1/17 → 5/31/20
Project: Research project
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SHF: Small: Collaborative Research: Variation-Resilient
THE NATIONAL SCIENCE FOUNDATION
8/1/15 → 7/31/19
Project: Research project
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SHF: Small: Collaborative Research:Variation-Resilient VLSI Systems with Cross-Layer Controlled Approximation
8/1/15 → 7/31/19
Project: Research project
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SHF: Small: Stress Management in Integrated Circuits
THE NATIONAL SCIENCE FOUNDATION
7/15/14 → 6/30/19
Project: Research project
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C-SPIN: Center for Spintronic Materials, Interfaces
Wang, J., Crowell, P. A., Kim, C. H., Koester, S. J., Li, M., Lilja, D. J., Mkhoyan, A., Sapatnekar, S. S. & Victora, R. H.
MICROELECTRONICS ADVANCED RESEARCH CORP., SEMICONDUCTOR RESEARCH CORPORATION
1/15/13 → 12/31/17
Project: Research project
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SHF: Medium: Collaborative Research: AgELESS: Aging Esti
Sapatnekar, S. S. & Kim, C. H.
THE NATIONAL SCIENCE FOUNDATION
5/1/12 → 4/30/17
Project: Research project
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SHF: Medium: Collaborative Research: AgELESS: Aging Estimation and Lifetime Enhancement in Silicon Systems
Sapatnekar, S. S. & Kim, C. H.
5/1/12 → 4/30/17
Project: Research project
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Building Robust Circuits in Advanced CMOS Technologies
SEMICONDUCTOR RESEARCH CORPORATION
1/1/12 → 8/31/15
Project: Research project
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SHF: Small: Enabling Resiliency in Nanometer-Scale CMOS
THE NATIONAL SCIENCE FOUNDATION
9/1/10 → 8/31/15
Project: Research project
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SHF: Small: Enabling Resiliency in Nanometer-Scale CMOS Circuits
9/1/10 → 8/31/15
Project: Research project
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An Integrated Design and CAD Approach for Efficient Powe
Sapatnekar, S. S. & Kim, C. H.
THE NATIONAL SCIENCE FOUNDATION
8/15/09 → 7/31/13
Project: Research project
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An Integrated Design and CAD Approach for Efficient Power Delivery in Multicore Processors
Sapatnekar, S. S. & Kim, C. H.
8/15/09 → 7/31/13
Project: Research project
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An Integrated Design and CAD Approach for Efficient Powe
Sapatnekar, S. S. & Kim, C. H.
SEMICONDUCTOR RESEARCH CORPORATION
8/1/09 → 1/31/13
Project: Research project
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Integrated Layout and Architectural Design for Multicore
SEMICONDUCTOR RESEARCH CORPORATION
7/1/08 → 8/31/11
Project: Research project
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Variability Analysis for PLLs, Timing, Power and Reliabi
Sapatnekar, S. S. & Roychowdhury, J.
SEMICONDUCTOR RESEARCH CORPORATION
1/1/07 → 12/31/10
Project: Research project
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3D-ADOPT: Phase III of the 3D IC Program Proposal
PARAMETRIC TECH CORP, USDOD AIR FORCE
10/12/06 → 8/26/09
Project: Research project
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Stochastically-inspired methods for solving systems of l
THE NATIONAL SCIENCE FOUNDATION
9/15/06 → 8/31/11
Project: Research project
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Stochastically-inspired methods for solving systems of linear equations
9/15/06 → 8/31/11
Project: Research project
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Thermal Effects in Integrated Circuits
THE NATIONAL SCIENCE FOUNDATION
3/15/06 → 2/28/10
Project: Research project
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ITR: Methodologies for Robust Design of Information Systems under Multiple Sources of Uncertainty
Blaauw, D. D., Vrudhula, S. S. K., Sylvester, D. & Sapatnekar, S. S.
8/1/02 → 7/31/08
Project: Research project
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Design Automation Techniques for SOI and High-Performance Bulk CMOS Designs
9/1/01 → 8/31/04
Project: Research project
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Enabling Safe Interconnect Re-pipeling during Design Imp
Sapatnekar, S. S. & Lilja, D. J.
1/1/98 → 1/31/17
Project: Research project
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CAREER: Gate-Level Performance Optimization of Pipelines and General Sequential Circuits
9/1/97 → 7/31/99
Project: Research project
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CISE Research Instrumentation: High Performance Computing and Application Laboratory
Mohapatra, P. P., Chao, L. L., Tridandapani, S. S. & Sapatnekar, S. S.
1/15/97 → 12/31/97
Project: Research project
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CAREER: Gate-Level Performance Optimization of Pipelines and General Sequential Circuits
8/1/95 → 7/31/98
Project: Research project