A Multi-Mode DC-DC Converter for Direct Battery-to-Silicon High Tension Power Delivery in 65nm CMOS

Saurabh Chaubey, Ramesh Harjani

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

We present a multi-mode DC-DC converter that directly takes the output of a Li-ion battery and converts it to on-chip voltages suitable for integrated electronics. The design in standard 65nm CMOS converts the Li-ion battery voltage that can vary between 4.2V to 2.8V directly to a internal V-{DD voltage that ranges between 1.5V to 0.3V. The 65nm design safely handles the high voltage delivery while providing conversion ratios between 1 to 13. To maintain high efficiency throughout, the proposed DC-DC converter functions in three distinct modes resonant, soft-switching and four-level-buck. We use a bond wire inductor (≈ 11 nH) as the high Q passive for all three modes. The design uses core devices only. The converter handles load currents between 0.5-200mA (400X), achieves a peak efficiency of 86.6% and has a peak power density of 0.3W/mm2. The prototype was fabricated in TSMC's 65nm GP CMOS.

Original languageEnglish (US)
Title of host publication2019 IEEE Custom Integrated Circuits Conference, CICC 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781538693957
DOIs
StatePublished - Apr 2019
Event40th Annual IEEE Custom Integrated Circuits Conference, CICC 2019 - Austin, United States
Duration: Apr 14 2019Apr 17 2019

Publication series

NameProceedings of the Custom Integrated Circuits Conference
Volume2019-April
ISSN (Print)0886-5930

Conference

Conference40th Annual IEEE Custom Integrated Circuits Conference, CICC 2019
Country/TerritoryUnited States
CityAustin
Period4/14/194/17/19

Bibliographical note

Funding Information:
VI. ACKNOWLEDGMENTS This work was supported by SRC task ID 2712.008.

Publisher Copyright:
© 2019 IEEE.

Fingerprint

Dive into the research topics of 'A Multi-Mode DC-DC Converter for Direct Battery-to-Silicon High Tension Power Delivery in 65nm CMOS'. Together they form a unique fingerprint.

Cite this