A programmable adaptive phase-shifting PLL for clock data compensation under resonant supply noise

Dong Jiao; Chris H. Kim

doi:10.1109/ISSCC.2011.5746315

A programmable adaptive phase-shifting PLL for clock data compensation under resonant supply noise

Dong Jiao, Chris H. Kim

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

12 Scopus citations

Abstract

Power supply noise has become one of the main performance-limiting factors in sub-1V technologies. Resonant supply noise caused by the package/bonding inductance and on-die capacitance has been reported as the dominant supply noise component in high performance microprocessors [1,2]. Resonant noise frequency typically resides in the 40MHz to 300MHz frequency band but can be made as low as 7MHz with a dedicated metal-insulator-metal capacitor technology [3].

Original language	English (US)
Title of host publication	2011 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2011
Pages	272-273
Number of pages	2
DOIs	https://doi.org/10.1109/ISSCC.2011.5746315
State	Published - May 12 2011
Event	2011 IEEE International Solid-State Circuits Conference, ISSCC 2011 - San Francisco, CA, United States Duration: Feb 20 2011 → Feb 24 2011

Publication series

Name	Digest of Technical Papers - IEEE International Solid-State Circuits Conference
ISSN (Print)	0193-6530

Other

Other	2011 IEEE International Solid-State Circuits Conference, ISSCC 2011
Country/Territory	United States
City	San Francisco, CA
Period	2/20/11 → 2/24/11

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10.1109/ISSCC.2011.5746315

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Jiao, D., & Kim, C. H. (2011). A programmable adaptive phase-shifting PLL for clock data compensation under resonant supply noise. In 2011 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2011 (pp. 272-273). Article 5746315 (Digest of Technical Papers - IEEE International Solid-State Circuits Conference). https://doi.org/10.1109/ISSCC.2011.5746315

A programmable adaptive phase-shifting PLL for clock data compensation under resonant supply noise. / Jiao, Dong; Kim, Chris H.
2011 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2011. 2011. p. 272-273 5746315 (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Jiao, D & Kim, CH 2011, A programmable adaptive phase-shifting PLL for clock data compensation under resonant supply noise. in 2011 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2011., 5746315, Digest of Technical Papers - IEEE International Solid-State Circuits Conference, pp. 272-273, 2011 IEEE International Solid-State Circuits Conference, ISSCC 2011, San Francisco, CA, United States, 2/20/11. https://doi.org/10.1109/ISSCC.2011.5746315

@inproceedings{d00b455ad9e24b1a9a22647bc4e6b06f,

title = "A programmable adaptive phase-shifting PLL for clock data compensation under resonant supply noise",

abstract = "Power supply noise has become one of the main performance-limiting factors in sub-1V technologies. Resonant supply noise caused by the package/bonding inductance and on-die capacitance has been reported as the dominant supply noise component in high performance microprocessors [1,2]. Resonant noise frequency typically resides in the 40MHz to 300MHz frequency band but can be made as low as 7MHz with a dedicated metal-insulator-metal capacitor technology [3].",

author = "Dong Jiao and Kim, {Chris H.}",

year = "2011",

month = may,

day = "12",

doi = "10.1109/ISSCC.2011.5746315",

language = "English (US)",

isbn = "9781612843001",

series = "Digest of Technical Papers - IEEE International Solid-State Circuits Conference",

pages = "272--273",

booktitle = "2011 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2011",

note = "2011 IEEE International Solid-State Circuits Conference, ISSCC 2011 ; Conference date: 20-02-2011 Through 24-02-2011",

}

TY - GEN

T1 - A programmable adaptive phase-shifting PLL for clock data compensation under resonant supply noise

AU - Jiao, Dong

AU - Kim, Chris H.

PY - 2011/5/12

Y1 - 2011/5/12

N2 - Power supply noise has become one of the main performance-limiting factors in sub-1V technologies. Resonant supply noise caused by the package/bonding inductance and on-die capacitance has been reported as the dominant supply noise component in high performance microprocessors [1,2]. Resonant noise frequency typically resides in the 40MHz to 300MHz frequency band but can be made as low as 7MHz with a dedicated metal-insulator-metal capacitor technology [3].

AB - Power supply noise has become one of the main performance-limiting factors in sub-1V technologies. Resonant supply noise caused by the package/bonding inductance and on-die capacitance has been reported as the dominant supply noise component in high performance microprocessors [1,2]. Resonant noise frequency typically resides in the 40MHz to 300MHz frequency band but can be made as low as 7MHz with a dedicated metal-insulator-metal capacitor technology [3].

UR - http://www.scopus.com/inward/record.url?scp=79955707800&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=79955707800&partnerID=8YFLogxK

U2 - 10.1109/ISSCC.2011.5746315

DO - 10.1109/ISSCC.2011.5746315

M3 - Conference contribution

AN - SCOPUS:79955707800

SN - 9781612843001

T3 - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

SP - 272

EP - 273

BT - 2011 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2011

T2 - 2011 IEEE International Solid-State Circuits Conference, ISSCC 2011

Y2 - 20 February 2011 through 24 February 2011

ER -

A programmable adaptive phase-shifting PLL for clock data compensation under resonant supply noise

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