An algorithm transformation approach to CORDIC based parallel singular value decompositions architectures

Jun Ma, K. K. Parhi, E. F. Deprettere

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations

Abstract

Singular value decomposition (SVD) has become a standard linear algebra tool in modern digital signal processing. CORDIC based SVD algorithms are among the most popular SVD algorithms which exhibit good numerical properties. The speed of the sequential algorithms is however limited by the recursive feedback loops in the underlying signal flow graph. The critical loop computation time is proportional to the size of the problem which prohibits pipelined processing. This paper addresses the derivation of parallel architectures for SVD updating algorithms. An algorithm transformation approach based on re-Timing and matrix associativity is presented to drive parallel SVD updating architectures. These architectures have critical loop computation time independent of the problem size and are suitable for CORDIC arithmetic based VLSI implementations.

Original languageEnglish (US)
Title of host publicationConference Record of the 33rd Asilomar Conference on Signals, Systems, and Computers
EditorsMichael B. Matthews
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1401-1405
Number of pages5
ISBN (Electronic)0780357000, 9780780357006
DOIs
StatePublished - Jan 1 1999
Externally publishedYes
Event33rd Asilomar Conference on Signals, Systems, and Computers, ACSSC 1999 - Pacific Grove, United States
Duration: Oct 24 1999Oct 27 1999

Publication series

NameConference Record of the 33rd Asilomar Conference on Signals, Systems, and Computers
Volume2

Other

Other33rd Asilomar Conference on Signals, Systems, and Computers, ACSSC 1999
CountryUnited States
CityPacific Grove
Period10/24/9910/27/99

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