Design of analog self-checking circuits

Bapiraju Vinnakota, Ramesh Harjani

Research output: Chapter in Book/Report/Conference proceedingConference contribution

12 Scopus citations

Abstract

In this paper we introduce a new class of analog circuits, self-checking analog circuits. We develop and discuss methods to design members of this new class. We target the class of fully differential analog circuits and use the inherent dual-rail code to develop self-checking circuits. We describe the design of a self-checking operational amplifier and the associated subcircuits. Our methodology has wide application as many analog circuits already are or can be transformed into fully differential circuits.

Original languageEnglish (US)
Title of host publicationProceedings of the IEEE International Conference on VLSI Design
Editors Anon
PublisherPubl by IEEE
Pages67-70
Number of pages4
ISBN (Print)0818649909
StatePublished - Jan 1 1994
EventProceedings of the 7th International Conference on VLSI Design - Calcutta, India
Duration: Jan 5 1994Jan 8 1994

Publication series

NameProceedings of the IEEE International Conference on VLSI Design

Other

OtherProceedings of the 7th International Conference on VLSI Design
CityCalcutta, India
Period1/5/941/8/94

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