Abstract
In a three-level flying capacitor inverter, certain switching state sequences can cause an undesirable transient in the pole voltage. The transients constitute and error voltage which degrades harmonic performance, distorts the current and generates electromagnetic noise. This paper presents a scheme to completely eliminate these dead-time transients using a digital state machine to determine the switching state to be applied in the subsequent switching period based on the present switching state. The modified switching state does not change the effective phase voltage, and the floating capacitors are kept well balanced. The proposed scheme works independent of the modulation or control scheme in use. The scheme was first tested in simulation, followed by deployment on an FPGA for hardware validation and timing analysis.
Original language | English (US) |
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Pages | 1-6 |
Number of pages | 6 |
DOIs | |
State | Published - Apr 27 2017 |
Event | 2016 IEEE International Conference on Power Electronics, Drives and Energy Systems, PEDES 2016 - Trivandrum, Kerala, India Duration: Dec 14 2016 → Dec 17 2016 |
Other
Other | 2016 IEEE International Conference on Power Electronics, Drives and Energy Systems, PEDES 2016 |
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Country/Territory | India |
City | Trivandrum, Kerala |
Period | 12/14/16 → 12/17/16 |
Bibliographical note
Publisher Copyright:© 2016 IEEE.
Keywords
- Dead time
- Flying capacitor
- PWM
- State machine
- Switching states