Impact of NBTI on SRAM read stability and design for reliability

Research output: Chapter in Book/Report/Conference proceedingConference contribution

231 Scopus citations

Abstract

Negative bias temperature instability (NBTI) has the potential to become one of the main show-stoppers of circuit reliability in nanometer scale devices due to its deleterious effects on transistor threshold voltage. The degradation of PMOS devices due to NBTI leads to reduced temporal performance in digital circuits. We have analyzed the impact of NBTI on the read stability of SRAM cells. The amount of degradation in static noise margin (SNM) which is a measure of the read stability of the 6-T SRAM cell has been estimated using reaction-diffusion (R-D) model. We propose a simple solution to recover the SNM of the SRAM cell using a data flipping technique and present the results simulated on BPTM 70nm and 100nm technology. We also compare and evaluate different implementation methodologies for the proposed technique.

Original languageEnglish (US)
Title of host publicationProceedings - 7th International Symposium on Quality Electronic Design, ISQED 2006
Pages210-218
Number of pages9
DOIs
StatePublished - Dec 1 2006
Event7th International Symposium on Quality Electronic Design, ISQED 2006 - San Jose, CA, United States
Duration: Mar 27 2006Mar 29 2006

Publication series

NameProceedings - International Symposium on Quality Electronic Design, ISQED
ISSN (Print)1948-3287
ISSN (Electronic)1948-3295

Other

Other7th International Symposium on Quality Electronic Design, ISQED 2006
Country/TerritoryUnited States
CitySan Jose, CA
Period3/27/063/29/06

Keywords

  • Cache
  • Negative Bias Temperature Instability (NBTI)
  • Reaction-Diffusion (R-D) Model.
  • SRAM
  • Static Noise Margin (SNM)

Fingerprint

Dive into the research topics of 'Impact of NBTI on SRAM read stability and design for reliability'. Together they form a unique fingerprint.

Cite this