Pentacene organic field-effect transistor on metal substrate with spin-coated smoothing layer

Yanbo Jin; Zhenlin Rang; Marshall I. Nathan; P. Paul Ruden; Christopher R. Newman; C. Daniel Frisbie

doi:10.1063/1.1814802

Pentacene organic field-effect transistor on metal substrate with spin-coated smoothing layer

Yanbo Jin, Zhenlin Rang, Marshall I. Nathan, P. Paul Ruden, Christopher R. Newman, C. Daniel Frisbie

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Abstract

In this letter we report the use of roughly polished aluminum substrates with spin-coated polymer-smoothing layers for the fabrication of pentacene field-effect transistors. Transistors with spin-coated poly(methylrnethacrylate) gate insulator layers were fabricated and showed good performance. On the gate insulator surface, the root-mean-square roughness was found to be 0.18 nm. significantly smaller than the aluminum surface roughness, which is on the scale of tens of nanometers. Field-effect carrier mobilities extracted from the device data reached 0.75 cm ² V ^-1 s ^-1 ; the maximum on/off current ratio was near 05 × 10 ⁶.

Original language	English (US)
Pages (from-to)	4406-4408
Number of pages	3
Journal	Applied Physics Letters
Volume	85
Issue number	19
DOIs	https://doi.org/10.1063/1.1814802
State	Published - Nov 8 2004

Bibliographical note

Funding Information:
This work was partially supported by the NSF materials research science and engineering center program MRSEC (DMR No. 0212302). The authors gratefully acknowledge Paul V. Pesavento, Kanan P. Puntambekar, Lei Diao, Jeffrey A. Merlo, and Xiuyu Cai for experimental support.

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abstract = "In this letter we report the use of roughly polished aluminum substrates with spin-coated polymer-smoothing layers for the fabrication of pentacene field-effect transistors. Transistors with spin-coated poly(methylrnethacrylate) gate insulator layers were fabricated and showed good performance. On the gate insulator surface, the root-mean-square roughness was found to be 0.18 nm. significantly smaller than the aluminum surface roughness, which is on the scale of tens of nanometers. Field-effect carrier mobilities extracted from the device data reached 0.75 cm 2 V -1 s -1 ; the maximum on/off current ratio was near 05 × 10 6.",

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note = "Funding Information: This work was partially supported by the NSF materials research science and engineering center program MRSEC (DMR No. 0212302). The authors gratefully acknowledge Paul V. Pesavento, Kanan P. Puntambekar, Lei Diao, Jeffrey A. Merlo, and Xiuyu Cai for experimental support. ",

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AU - Jin, Yanbo

AU - Rang, Zhenlin

AU - Nathan, Marshall I.

AU - Paul Ruden, P.

AU - Newman, Christopher R.

AU - Daniel Frisbie, C.

N1 - Funding Information: This work was partially supported by the NSF materials research science and engineering center program MRSEC (DMR No. 0212302). The authors gratefully acknowledge Paul V. Pesavento, Kanan P. Puntambekar, Lei Diao, Jeffrey A. Merlo, and Xiuyu Cai for experimental support.

PY - 2004/11/8

Y1 - 2004/11/8

N2 - In this letter we report the use of roughly polished aluminum substrates with spin-coated polymer-smoothing layers for the fabrication of pentacene field-effect transistors. Transistors with spin-coated poly(methylrnethacrylate) gate insulator layers were fabricated and showed good performance. On the gate insulator surface, the root-mean-square roughness was found to be 0.18 nm. significantly smaller than the aluminum surface roughness, which is on the scale of tens of nanometers. Field-effect carrier mobilities extracted from the device data reached 0.75 cm 2 V -1 s -1 ; the maximum on/off current ratio was near 05 × 10 6.

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Pentacene organic field-effect transistor on metal substrate with spin-coated smoothing layer

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