An analysis of finite precision effects in nonbinary mixed-domain low-density parity-check decoders is presented. It is shown how improved decoding performance can be achieved by using an offset-based method and proper scaling techniques. In addition, a novel fast Fourier transform (FFT)-based belief propagation (BP) decoder architecture is proposed which balances the computational load between processing units. The results show a 47% reduction in the number of required field-programmable gate array slices compared to a standard FFT-based BP architecture.
|Original language||English (US)|
|Number of pages||5|
|Journal||IEEE Transactions on Circuits and Systems II: Express Briefs|
|State||Published - Apr 1 2013|
- field-programmable gate array (FPGA)
- Galois field (GF)
- low-density parity check (LDPC)