Scanning tunneling microscope-based nanolithography for electronic device fabrication

Joseph W. Lyding; Roger T. Brockenbrough; Patrick J. Fay; John R. Tucker; Karl Hess; Ted K. Higman

doi:10.1117/12.183199

Scanning tunneling microscope-based nanolithography for electronic device fabrication

Joseph W. Lyding, Roger T. Brockenbrough, Patrick J. Fay, John R. Tucker, Karl Hess, Ted K. Higman

Electrical and Computer Engineering

Research output: Contribution to journal › Conference article › peer-review

2 Scopus citations

Abstract

The scanning tunneling microscope (STM) has evolved from a new surface science tool into one capable of performing surface modifications down to nanometer and even atomic dimensions. This suggests the possibility of developing STM-based lithography strategies for the fabrication of electronic device structures with nanometer scale features. On this size scale, it should be possible for quantum interference and coulomb charging effects to influence device function at 77 K or even higher temperatures. This chapter reviews our progress towards merging STM nanolithography with conventional processing technologies to create devices whose electronic function depends on their nanofabricated features. We have successfully patterned the gate regions of silicon MOSFET devices which were fabricated with provisions for STM modification.

Original language	English (US)
Article number	1031008
Pages (from-to)	111-126
Number of pages	16
Journal	Proceedings of SPIE - The International Society for Optical Engineering
Volume	10310
DOIs	https://doi.org/10.1117/12.183199
State	Published - Oct 3 1993
Event	Technology of Proximal Probe Lithography 1993 - Bellingham, United States Duration: Oct 3 1993 → …

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title = "Scanning tunneling microscope-based nanolithography for electronic device fabrication",

abstract = "The scanning tunneling microscope (STM) has evolved from a new surface science tool into one capable of performing surface modifications down to nanometer and even atomic dimensions. This suggests the possibility of developing STM-based lithography strategies for the fabrication of electronic device structures with nanometer scale features. On this size scale, it should be possible for quantum interference and coulomb charging effects to influence device function at 77 K or even higher temperatures. This chapter reviews our progress towards merging STM nanolithography with conventional processing technologies to create devices whose electronic function depends on their nanofabricated features. We have successfully patterned the gate regions of silicon MOSFET devices which were fabricated with provisions for STM modification.",

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AU - Hess, Karl

AU - Higman, Ted K.

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Scanning tunneling microscope-based nanolithography for electronic device fabrication

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