Abstract
Using a new technique for forming cubic, single crystal silicon nanoparticles about 40 nm on a side, the authors have demonstrated a vertical flow, surround gate, Schottky barrier transistor. This approach allows the use of well known approaches to surface passivation and contact formation within the context of deposited single crystal materials for device applications. It opens the door to novel three dimensional integrated circuits and new approaches to hyper-integration. The fabrication process involves successive deposition and planarization and does not require any type of nonoptical lithography. Device characteristics show reasonable turn-off characteristics and on-current densities of more than 10 7 A/cm 2.
Original language | English (US) |
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Title of host publication | Proceedings of SPIE - The International Society for Optical Engineering |
Editors | W.Y. Lai, L.E. Ocola, S. Pau |
Volume | 6002 |
DOIs | |
State | Published - 2005 |
Event | Nanofabrication: Technologies, Devices, and Applications II - Boston, MA, United States Duration: Oct 23 2005 → Oct 25 2005 |
Other
Other | Nanofabrication: Technologies, Devices, and Applications II |
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Country/Territory | United States |
City | Boston, MA |
Period | 10/23/05 → 10/25/05 |
Keywords
- FET
- Nanoparticle
- Schottky barrier transistor
- Silicon