TY - GEN
T1 - The synthesis of robust polynomial arithmetic with stochastic logic
AU - Qian, Weikang
AU - Riedel, Marc
N1 - Copyright:
Copyright 2011 Elsevier B.V., All rights reserved.
PY - 2008
Y1 - 2008
N2 - As integrated circuit technology plumbs ever greater depths in the scaling of feature sizes, maintaining the paradigm of deterministic Boolean computation is increasingly challenging. Indeed, mounting concerns over noise and uncertainty in signal values motivate a new approach: the design of stochastic logic, that is to say, digital circuitry that processes signals probabilistically, and so can cope with errors and uncertainty. In this paper, we present a general methodology for synthesizing stochastic logic for the computation of polynomial arithmetic functions, a category that is important for applications such as digital signal processing. The method is based on converting polynomials into a particular mathematical form - Bernstein polynomials - and then implementing the computation with stochastic logic. The resulting logic processes serial or parallel streams that are random at the bit level. In the aggregate, the computation becomes accurate, since the results depend only on the precision of the statistics. Experiments show that our method produces circuits that are highly tolerant of errors in the input stream, while the area-delay product of the circuit is comparable to that of deterministic implementations.
AB - As integrated circuit technology plumbs ever greater depths in the scaling of feature sizes, maintaining the paradigm of deterministic Boolean computation is increasingly challenging. Indeed, mounting concerns over noise and uncertainty in signal values motivate a new approach: the design of stochastic logic, that is to say, digital circuitry that processes signals probabilistically, and so can cope with errors and uncertainty. In this paper, we present a general methodology for synthesizing stochastic logic for the computation of polynomial arithmetic functions, a category that is important for applications such as digital signal processing. The method is based on converting polynomials into a particular mathematical form - Bernstein polynomials - and then implementing the computation with stochastic logic. The resulting logic processes serial or parallel streams that are random at the bit level. In the aggregate, the computation becomes accurate, since the results depend only on the precision of the statistics. Experiments show that our method produces circuits that are highly tolerant of errors in the input stream, while the area-delay product of the circuit is comparable to that of deterministic implementations.
KW - Polynomial arithmetic
KW - Probabilistic logic
KW - Stochastic logic
UR - http://www.scopus.com/inward/record.url?scp=51549098018&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=51549098018&partnerID=8YFLogxK
U2 - 10.1109/DAC.2008.4555898
DO - 10.1109/DAC.2008.4555898
M3 - Conference contribution
AN - SCOPUS:51549098018
SN - 9781605581156
T3 - Proceedings - Design Automation Conference
SP - 648
EP - 653
BT - Proceedings of the 45th Design Automation Conference, DAC
T2 - 45th Design Automation Conference, DAC
Y2 - 8 June 2008 through 13 June 2008
ER -